期刊簡介預計審稿時間： 12周，或約稿

The focus of this journal is on formal methods for designing, implementing, and validating the correctness of hardware (VLSI) and software systems. The stimulus for starting a journal with this goal came from both academia and industry. In both areas, interest in the use of formal methods has increased rapidly during the past few years. The enormous cost and time required to validate new designs has led to the realization that more powerful techniques must be developed. A number of techniques and tools are currently being devised for improving the reliability, and robustness of complex hardware and software systems. While the boundary between the (sub)components of a system that are cast in hardware, firmware, or software continues to blur, the relevant design disciplines and formal methods are maturing rapidly. Consequently, an important (and useful) collection of commonly applicable formal methods are expected to emerge that will strongly influence future design environments and design methods.

本期刊的重點是設計、實施和驗證硬件（VLSI）和軟件系統正確性的形式化方法。以此為目標創辦期刊的動機來自學術界和工業界。在這兩個領域，人們對使用形式化方法的興趣在過去幾年中迅速增加。驗證新設計所需的巨大成本和時間使人們意識到必須開發更強大的技術。目前正在設計許多技術和工具來提高復雜硬件和軟件系統的可靠性和穩健性。雖然系統中硬件、固件或軟件的（子）組件之間的界限繼續模糊，但相關的設計學科和形式化方法正在迅速成熟。因此，預計將出現一個重要（且有用）的常用形式化方法集合，這將對未來的設計環境和設計方法產生重大影響。

《Formal Methods In System Design》(系統設計中的形式化方法)編輯部通訊方式為SPRINGER, VAN GODEWIJCKSTRAAT 30, DORDRECHT, NETHERLANDS, 3311 GZ。如果您需要協助投稿或潤稿服務，您可以咨詢我們的客服老師。我們專注于期刊咨詢服務十年，熟悉發表政策，可為您提供一對一投稿指導，避免您在投稿時頻繁碰壁，節省您的寶貴時間，有效提升發表機率，確保SCI檢索（檢索不了全額退款）。我們視信譽為生命，多方面確保文章安全保密，在任何情況下都不會泄露您的個人信息或稿件內容。